1. Field of the Invention
The present invention relates to an electrode structure of a capacitor for a semiconductor memory device and a fabrication method thereof, and more particularly, to an improved electrode structure of a capacitor for a semiconductor memory device and a fabrication method thereof suitable for the formation of a high dielectric thin film.
2. Description of the Prior Art
Recently, as the degree of integration of semiconductor memory devices has increased, the areal size of a memory cell is decreased. Generally, the reduction in the cell size causes the area of a capacitor .to be decreased. Therefore, to compensate for the reduction in capacitance, efforts continue for reducing the thickness of a dielectric film.
However, as the dielectric film is thinned, leakage current caused by tunneling is increased, resulting in lowering the reliability of the semiconductor memory device.
To prevent an extreme thinning of the dielectric film, methods for forming complicated surface irregularities to increase an effective area of a capacitor have been widely adopted, and as a result, the trend of film thinning has been slackened by using a high dielectric nitrided oxide film or re-oxidized nitrided oxide film. However, these methods result in a large level difference on the surface which make a photolithographic process difficult, and cause the production cost to be increased, which makes them difficult to be used in a high-integrated device such as a 256MB DRAM.
Therefore, a method has been suggested that a high dielectric material is adopted as a dielectric film of a capacitor to reduce a surface irregularity of the capacitor and increase its capacitance.
Ta2O5 is widely used as a high dielectric material for a capacitor, and consequently, a film thinning, an improvement of the characteristic and a solution of the problems caused by higher integration have been effectively achieved. However, the actual dielectric constant obtained is not so high so that the range of use is not expected to be so wide when the trend of a gradually higher integration in the future is take into consideration.
So, recently, instead of Ta2O5, studies on perovskite oxides including a ferroelectric material have been conducted, and the oxides include Pb (Zr,Ti) O3 (PZT), (Pb,La) (Zr,Ti) O3 (PZT), (Ba,Sr) TiO3 (BST), BaTiO3 and SrTiO3.
However, the above materials easily react with a silicon or silicide substrate, and the surface of an electrode is exposed to the atmosphere undergoes a strong oxidation in the process of formation of a thin film, resulting in a disadvantageous oxidation of the electrode.
Therefore, for the formation of a ferroelectric material using a perovskite oxide, the studies on various materials for an electrode and its structure have been continued to solve the problems resulting from an integration process.
According to the method which has been adopted for forming a capacitor, an electrode with a complicated structure is formed, and then an oxide film is formed on the surface of the electrode by a thermal oxidation, and as a result, there has been no problem for a step coverage. However, since the above-mentioned perovskite materials include many elements, and the reaction source including the elements is an organometallic compound, the formation process for a dielectric thin film is performed by a metal organic chemical vapor deposition (hereinafter, called MOCD).
However, since the MOCD has an excellent step coverage quality, it can be easily carried out on a surface having complicated irregularities or narrow holes, but in a device formed with a narrow and deep space (e.g. a fin-type or trench-type capacitor), it cannot realize an adequate step coverage. Particularly, in case the MOCD is employed in forming a dielectric film of a capacitor, as shown in FIG. 1A, when a dielectric film 3 is deposited to have a minimum thickness on an entire surface of an electrode 2, a levelled surface 3A occupying a broader area attains a thicker dielectric film, resulting in having a decreased capacitance. At the cross-sectional surface of the electrode 2, a section 3B perpendicular to the substrate 1 is perpendicularly formed to the levelled surface 3A. Consequently, the characteristic of the dielectric film 3 deposited on the orthogonal portion is lowered and an electric field is concentrated on the portion, resulting in generating a leakage current and a contamination.
To solve the problems in the capacitor construction of FIG. 1A, a side wall 4 is formed around the electrode 2 to eliminate a sharp orthogonal portion as shown in FIG. 1B, but when the side wall 4 is composed of a conductive material, as shown in FIG. 1B, an irregularity in thickness exists on the portion perpendicular to the levelled surface 3A after the formation of the dielectric film 31, and when the side wall 4 is composed of an insulating material, the actual area of the electrode 2 is decreased.
Further, the two methods described with reference to FIGS. 1A and 1B require an additional deposition and an etching process, resulting in increasing the production cost.
Since the MOCD adopts a reaction source having a low vapor pressure, a special transferring apparatus has to be equipped for the reaction source, and the use of a plurality of reaction sources causes the process to be complicated.
The problems generated by adopting the MOCD can be easily solved by employing a sputtering method. In case of the sputtering method, since one kind of a target fabricated of a well-controlled composition is used, the composition control of the dielectric film is relatively easy, and particularly, since the sputtering method is a fully developed technology in semiconductor processing, problems which arise in the future can be easily treated.
However, since with the sputtering method a conformal deposition is impossible to obtain, it is difficult to apply to a highly integrated device.
Finally, as described above, in the conventional electrode structure of a capacitor for a semiconductor memory device, as the degree of integration of the device is rapidly increased, whatever method is adopted including the MOCD or the sputtering method, the formation process for a high dielectric thin film is difficult to perform.
Accordingly, it is an object of the present invention to provide an improved electrode structure of a capacitor for a semiconductor memory device and a fabrication method thereof in which a high dielectric thin film can be easily formed in forming a capacitor for a semiconductor memory device.
To achieve the above object, there is provided an improved electrode structure of a capacitor for a semiconductor memory device which includes a lower electrode each surface of which is formed to have the same slope with respect to a substrate, a dielectric or ferroelectric thin film formed to have a regular thickness on the lower electrode, and an upper electrode formed to have a regular thickness on the thin film.
To achieve the above object, there is also provided an improved fabrication method for a capacitor for a semiconductor memory device which includes forming an interlayer insulation film on a substrate having a transistor formed therein, forming an electrode material half as thick as the length of a shorter side among two bottom sides of a electrode of the capacitor on the interlayer insulation layer, forming a resist on the electrode material for patterning the same, forming a lower electrode each surface of which has the same slope with respect to the substrate by performing an isotropic etching on the electrode material having the resist pattern thereon and the resist, forming a dielectric film on the lower electrode to have a regular thickness, and forming an upper electrode on the dielectric film to have a regular thickness.